litex/litex
David Shah 90315868a8 clock/lattice_nx: Set PLLRESET_ENA parameter
If this parameter isn't set to ENABLED; then the PLLRESET signal is
ignored.

Signed-off-by: David Shah <dave@ds0.me>
2020-12-03 11:49:48 +00:00
..
boards symbiflow: remove workarounds for symbiflow 2020-11-23 10:33:11 +01:00
build Add Yosys/nextpnr-nexus/oxide flow for CrossLink-NX 2020-11-25 09:44:51 +00:00
gen gen/fhdl/verilog: improve clock domain error reporting. 2020-11-10 13:27:29 +01:00
soc clock/lattice_nx: Set PLLRESET_ENA parameter 2020-12-03 11:49:48 +00:00
tools tools/comm_udp/litex_server: add --udp-scan args to scan network for available Etherbone/UDP devices. 2020-11-26 13:33:20 +01:00
__init__.py revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp). 2020-11-05 19:55:18 +01:00