litex/litex/soc/software
Florent Kermarrec 915c2f417a bios/sdram: improve write/read leveling
write_leveling: select last 0 to 1 transition.
read_leveling: do it by module (select best bitslip for each module)
2018-10-10 10:42:56 +02:00
..
bios bios/sdram: improve write/read leveling 2018-10-10 10:42:56 +02:00
compiler_rt@81fb4f00c2 litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00
include cores/cpu: revert vexriscv (it seems there is a regression in last version) 2018-10-02 12:30:11 +02:00
libbase Fix compiler warnings from GCC 8.1 2018-10-04 23:07:48 +09:00
libcompiler_rt Add lm32 "lite" variant, remove mult/div from "minimal" and update compiler flags accordingly. 2018-09-03 19:48:19 -04:00
libnet targets: pass endianness to LiteEThMAC, tftp working with RISC-V, still need to fix txlen 2018-09-07 10:37:15 +02:00
common.mak software/common: revert PYTHON to python3 (since breaking things) 2018-01-23 10:39:13 +01:00