Florent Kermarrec 67159349d6 soc/interconnect: remove axi_lite ... axi_lite code was defining AXI4Lite signals and doing a AXI4Lite bridge to the CSR bus when LiteX was not having proper AXI support. LiteX now has proper AXI support and it also cover what axi_lite was doing: To create a AXILite to CSR bus, user can create an AXILite2Wishbone bridge and then connect the CSR bus directly to the wishbone bus as done in the others non-AXI SoC.		2019-05-11 09:12:20 +02:00
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__init__.py
test_axi.py
test_code_8b10b.py
test_csr.py
test_gearbox.py
test_targets.py