litex/verilog/lm32
Sebastien Bourdeauducq b6b1901bb8 LM32: make IP read-only and interrupt lines level-sensitive 2012-02-07 00:07:12 +01:00
..
jtag_cores.v Initial import 2011-12-13 17:33:12 +01:00
jtag_tap_spartan6.v Initial import 2011-12-13 17:33:12 +01:00
lm32_adder.v Initial import 2011-12-13 17:33:12 +01:00
lm32_addsub.v Initial import 2011-12-13 17:33:12 +01:00
lm32_cpu.v Initial import 2011-12-13 17:33:12 +01:00
lm32_dcache.v Initial import 2011-12-13 17:33:12 +01:00
lm32_debug.v Initial import 2011-12-13 17:33:12 +01:00
lm32_decoder.v Initial import 2011-12-13 17:33:12 +01:00
lm32_dp_ram.v Initial import 2011-12-13 17:33:12 +01:00
lm32_functions.v Initial import 2011-12-13 17:33:12 +01:00
lm32_icache.v Initial import 2011-12-13 17:33:12 +01:00
lm32_include.v Initial import 2011-12-13 17:33:12 +01:00
lm32_instruction_unit.v Initial import 2011-12-13 17:33:12 +01:00
lm32_interrupt.v LM32: make IP read-only and interrupt lines level-sensitive 2012-02-07 00:07:12 +01:00
lm32_jtag.v Initial import 2011-12-13 17:33:12 +01:00
lm32_load_store_unit.v Initial import 2011-12-13 17:33:12 +01:00
lm32_logic_op.v Initial import 2011-12-13 17:33:12 +01:00
lm32_mc_arithmetic.v Initial import 2011-12-13 17:33:12 +01:00
lm32_multiplier.v Initial import 2011-12-13 17:33:12 +01:00
lm32_multiplier_spartan6.v Initial import 2011-12-13 17:33:12 +01:00
lm32_ram.v Initial import 2011-12-13 17:33:12 +01:00
lm32_shifter.v Initial import 2011-12-13 17:33:12 +01:00
lm32_top.v Initial import 2011-12-13 17:33:12 +01:00