litex/litex
Florent Kermarrec 9893c2460a integration/soc_core: add get_mem_data function to read memory content from file 2018-09-20 00:46:06 +02:00
..
boards targets/sim: merge in a single class and ease configuration 2018-09-19 23:59:15 +02:00
build Pull in b2740d9 from Migen. nextpnr now default, write out build scripts on dry run. 2018-09-17 21:17:24 -04:00
gen build: use our own fhdl/verilog code (needed to avoid combinatorial loop in simulation) 2018-05-01 12:02:54 +02:00
soc integration/soc_core: add get_mem_data function to read memory content from file 2018-09-20 00:46:06 +02:00
__init__.py litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00