William D. Jones ce243820fe tools/litex_term: Convert some common scan codes into ANSI codes on Windows.		2021-01-11 21:02:37 -05:00
..
build	Quartus: handle vh and svh files	2020-12-20 11:53:08 +01:00
gen	gen/fhdl/verilog: improve clock domain error reporting.	2020-11-10 13:27:29 +01:00
soc	software: allow BIOS compilation with UART disabled.	2021-01-08 19:18:44 +01:00
tools	tools/litex_term: Convert some common scan codes into ANSI codes on Windows.	2021-01-11 21:02:37 -05:00
__init__.py	revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp).	2020-11-05 19:55:18 +01:00