Florent Kermarrec a10b1fd1e6 gen/common/Reduce: Add ADD support.		2022-10-28 19:13:27 +02:00
..
build	vhd2v: Fix mixed langauge support	2022-10-26 16:29:53 +10:30
compat	…
gen	gen/common/Reduce: Add ADD support.	2022-10-28 19:13:27 +02:00
soc	soc/SoCBusHandler: Integrate interconnect code since avoid duplication and simplify reuse.	2022-10-28 12:47:38 +02:00
tools	tools/litex_read_verilog: Add proc step before exporting to .json since now seems to be required for some verilog designs.	2022-10-19 15:29:00 +02:00
__init__.py	…