Robert Jördens 9d241f8cd3 coding.py: rewrite If() to make verilog more readable		2013-06-30 11:39:47 +02:00
..
__init__.py	corelogic -> genlib	2013-02-22 23:19:37 +01:00
buffers.py	New migen.fhdl.std to simplify imports + len->flen	2013-05-22 17:11:09 +02:00
cdc.py	New migen.fhdl.std to simplify imports + len->flen	2013-05-22 17:11:09 +02:00
coding.py	coding.py: rewrite If() to make verilog more readable	2013-06-30 11:39:47 +02:00
complex.py	New migen.fhdl.std to simplify imports + len->flen	2013-05-22 17:11:09 +02:00
cordic.py	genlib/cordic: cleanup	2013-06-26 22:46:04 +02:00
divider.py	New migen.fhdl.std to simplify imports + len->flen	2013-05-22 17:11:09 +02:00
fifo.py	genlib/fifo: support records	2013-06-17 23:35:10 +02:00
fsm.py	FSM: new API	2013-06-25 22:17:39 +02:00
ioo.py	New migen.fhdl.std to simplify imports + len->flen	2013-05-22 17:11:09 +02:00
misc.py	genlib/misc: fix import	2013-05-30 18:46:52 +02:00
record.py	New migen.fhdl.std to simplify imports + len->flen	2013-05-22 17:11:09 +02:00
roundrobin.py	New migen.fhdl.std to simplify imports + len->flen	2013-05-22 17:11:09 +02:00