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a3c0e5c4d9
litex
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misoclib
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mem
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sdram
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Florent Kermarrec
3b9f287bab
sdram: use wishbone cache as L2 cache and add optional L2 cache to Minicon
2015-06-17 15:30:30 +02:00
..
core
sdram: use wishbone cache as L2 cache and add optional L2 cache to Minicon
2015-06-17 15:30:30 +02:00
frontend
sdram: use wishbone cache as L2 cache and add optional L2 cache to Minicon
2015-06-17 15:30:30 +02:00
phy
sdram/phy: fix simphy memory usage
2015-06-02 19:33:09 +02:00
test
global: more pep8
2015-04-13 18:02:26 +02:00
__init__.py
global: pep8 (replace tabs with spaces)
2015-04-13 16:19:55 +02:00
module.py
global: pep8 (E302)
2015-04-13 16:47:22 +02:00