litex/misoclib/mem/sdram
Florent Kermarrec a560ba35bd sdram/module: add AS4C16M16 for minispartan6 2015-03-21 18:38:53 +01:00
..
core
frontend sdram: reintroduce dat_ack change (it was a small issue on wishbone writes (sending data 1 clock cycle too late) that was not detected by memtest) 2015-03-02 10:59:43 +01:00
phy sdram: move lasmibus to core, rename crossbar to lasmixbar and move it to core, move dfi to phy 2015-03-03 09:55:25 +01:00
test sdram: move lasmibus to core, rename crossbar to lasmixbar and move it to core, move dfi to phy 2015-03-03 09:55:25 +01:00
__init__.py
module.py