litex/litex
Florent Kermarrec 2deffd8c8a build/sim/verilator: compile sim just before running and not when building. 2018-12-21 09:59:34 +01:00
..
boards platforms/kcu105: change internal vref to 0.84v (recommended value for ddr4) 2018-12-19 11:33:32 +01:00
build build/sim/verilator: compile sim just before running and not when building. 2018-12-21 09:59:34 +01:00
gen gen/sim/core: add args support on Display 2018-12-09 09:46:10 +01:00
soc bios/sdram: only show read delays when they are valid. 2018-12-19 11:19:47 +01:00
utils litex_sim: add --trace argument 2018-11-27 17:26:32 +01:00
__init__.py ease RemoteClient import 2018-09-23 10:23:00 +02:00