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af66ca7bad
litex
/
misoclib
/
com
/
uart
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Florent Kermarrec
af66ca7bad
uart: add phy autodetect function
2015-03-06 10:19:29 +01:00
..
phy
uart: add phy autodetect function
2015-03-06 10:19:29 +01:00
test
uart: create phy directory and move phy logic to serial.py (will enable selecting uart phy, for example virtual uart with LiteEth or sim model for Verilator)
2015-03-01 12:14:34 +01:00
__init__.py
uart: generate ack for rx (serialboot OK with sim)
2015-03-04 00:57:37 +01:00