64 lines
1.8 KiB
Python
64 lines
1.8 KiB
Python
import random
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from migen.fhdl.std import *
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from migen.genlib.record import *
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from migen.sim.generic import run_simulation
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from lib.sata.common import *
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from lib.sata.link import SATALink
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from lib.sata.transport import SATATransport
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from lib.sata.command import SATACommand
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from lib.sata.test.bfm import *
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from lib.sata.test.common import *
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class TB(Module):
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def __init__(self):
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self.submodules.bfm = BFM(phy_debug=False,
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link_random_level=0, transport_debug=True, transport_loopback=False)
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self.submodules.link = SATALink(self.bfm.phy)
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self.submodules.transport = SATATransport(self.link)
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self.submodules.command = SATACommand(self.transport)
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def gen_simulation(self, selfp):
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self.bfm.command.allocate_dma(0x00000000, 64*1024*1024)
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self.bfm.command.enable_dma()
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selfp.command.source.ack = 1
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for i in range(100):
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yield
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for i in range(32):
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selfp.command.sink.stb = 1
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selfp.command.sink.sop = (i==0)
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selfp.command.sink.eop = (i==31)
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selfp.command.sink.write = 1
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selfp.command.sink.address = 1024
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selfp.command.sink.length = 32
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selfp.command.sink.data = i
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yield
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while selfp.command.sink.ack == 0:
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yield
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selfp.command.sink.stb = 0
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for i in range(32):
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yield
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selfp.command.sink.stb = 1
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selfp.command.sink.sop = 1
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selfp.command.sink.eop = 1
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selfp.command.sink.write = 0
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selfp.command.sink.read = 1
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selfp.command.sink.address = 1024
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selfp.command.sink.length = 32
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yield
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while selfp.command.sink.ack == 0:
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yield
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selfp.command.sink.stb = 0
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while True:
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if selfp.command.source.stb:
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print("%08x" %selfp.command.source.data)
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yield
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#dma_dump = self.bfm.command.dma_read(1024, 32*4)
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#for d in dma_dump:
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# print("%08x" %d)
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if __name__ == "__main__":
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run_simulation(TB(), ncycles=512, vcd_name="my.vcd", keep_files=True)
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