enjoy-digital bebc667da6 Merge pull request #99 from cr1901/mk-copy-main-ram ... Add COPY_TO_MAIN_RAM generated Makefile variable to distinguish systems with/without "main_ram" region.		2018-09-08 03:55:23 +02:00
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boards	targets: pass endianness to LiteEThMAC, tftp working with RISC-V, still need to fix txlen	2018-09-07 10:37:15 +02:00
build	lattice/programmer: Use --program-image option with tinyprog if address is given.	2018-09-07 04:05:49 -04:00
gen	build: use our own fhdl/verilog code (needed to avoid combinatorial loop in simulation)	2018-05-01 12:02:54 +02:00
soc	Merge pull request #99 from cr1901/mk-copy-main-ram	2018-09-08 03:55:23 +02:00
__init__.py	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00