litex/misoclib/com/uart
Florent Kermarrec 8aa3fb3eb7 com/uart: add tx and rx fifos.
Since ressource usage is low with default depth of 16 (implemented in RAM LUTs) we don't keep old behaviour.
Tested successfully with BIOS and flterm.
2015-05-01 15:59:26 +02:00
..
phy misoclib/com/uart: remove liteeth dependency (copy/paste error) 2015-04-28 18:53:46 +02:00
test global: more pep8 2015-04-13 18:02:26 +02:00
__init__.py com/uart: add tx and rx fifos. 2015-05-01 15:59:26 +02:00