litex/lib/sata
Florent Kermarrec c08c0ffc4e link: check CRC on RX path 2014-12-25 17:15:35 +01:00
..
command link: check CRC on RX path 2014-12-25 17:15:35 +01:00
link link: check CRC on RX path 2014-12-25 17:15:35 +01:00
phy use new submodules collection to expose more fsm an modules 2014-12-19 22:50:35 +01:00
test link: check CRC on RX path 2014-12-25 17:15:35 +01:00
transport link: check CRC on RX path 2014-12-25 17:15:35 +01:00
__init__.py use max_count of 16 and clean up 2014-12-23 23:19:48 +01:00
bist.py add wr_only and rd_only mode to BIST (to test speed) and switch to 100MHz system clock 2014-12-23 20:41:13 +01:00
common.py link: check CRC on RX path 2014-12-25 17:15:35 +01:00