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litex/migen
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Sebastien Bourdeauducq c7b9dfc203 fhdl: simpler syntax 2011-12-16 21:30:14 +01:00
..
bank fhdl: simpler syntax 2011-12-16 21:30:14 +01:00
bus fhdl: simpler syntax 2011-12-16 21:30:14 +01:00
corelogic fhdl: simpler syntax 2011-12-16 21:30:14 +01:00
fhdl fhdl: simpler syntax 2011-12-16 21:30:14 +01:00
__init__.py Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00