litex/litex
Florent Kermarrec c8fcaaea2d integration/soc: use self.irq.enabled instead of hasattr(self.cpu, "interrupt"). 2020-11-30 10:17:03 +01:00
..
boards
build build/lattice/programmer/load_bitstream: convert .bit to .svf with bit_to_svf it bitstream_file provided as .bit. 2020-11-28 08:58:57 +01:00
gen gen/fhdl/verilog: improve clock domain error reporting. 2020-11-10 13:27:29 +01:00
soc integration/soc: use self.irq.enabled instead of hasattr(self.cpu, "interrupt"). 2020-11-30 10:17:03 +01:00
tools integration/soc: use self.irq.enabled instead of hasattr(self.cpu, "interrupt"). 2020-11-30 10:17:03 +01:00
__init__.py