52 lines
1.2 KiB
Python
52 lines
1.2 KiB
Python
from migen.fhdl.structure import *
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from migen.bus import wishbone
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class LM32:
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def __init__(self):
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self.ibus = i = wishbone.Interface()
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self.dbus = d = wishbone.Interface()
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self.interrupt = Signal(BV(32))
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self.ext_break = Signal()
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self._inst = Instance("lm32_top",
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[("I_ADR_O", BV(32)),
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("I_DAT_O", i.dat_w),
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("I_SEL_O", i.sel),
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("I_CYC_O", i.cyc),
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("I_STB_O", i.stb),
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("I_WE_O", i.we),
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("I_CTI_O", i.cti),
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("I_LOCK_O", BV(1)),
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("I_BTE_O", i.bte),
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("D_ADR_O", BV(32)),
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("D_DAT_O", d.dat_w),
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("D_SEL_O", d.sel),
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("D_CYC_O", d.cyc),
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("D_STB_O", d.stb),
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("D_WE_O", d.we),
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("D_CTI_O", d.cti),
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("D_LOCK_O", BV(1)),
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("D_BTE_O", d.bte)],
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[("interrupt", self.interrupt),
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#("ext_break", self.ext_break),
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("I_DAT_I", i.dat_r),
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("I_ACK_I", i.ack),
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("I_ERR_I", i.err),
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("I_RTY_I", BV(1)),
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("D_DAT_I", d.dat_r),
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("D_ACK_I", d.ack),
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("D_ERR_I", d.err),
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("D_RTY_I", BV(1))],
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clkport="clk_i",
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rstport="rst_i")
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def get_fragment(self):
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comb = [
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self._inst.ins["I_RTY_I"].eq(0),
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self._inst.ins["D_RTY_I"].eq(0),
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self.ibus.adr.eq(self._inst.outs["I_ADR_O"][2:]),
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self.dbus.adr.eq(self._inst.outs["D_ADR_O"][2:])
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]
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return Fragment(comb=comb, instances=[self._inst])
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