litex/migen/fhdl
Sebastien Bourdeauducq ea63389823 fhdl: support len() on all values 2013-04-14 13:50:26 +02:00
..
__init__.py Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00
module.py fhdl/module/finalize: pass additional args to do_finalize 2013-03-30 11:29:46 +01:00
namer.py New 'specials' API 2013-02-22 17:56:35 +01:00
specials.py fhdl/specials: clean up clock domain handling 2013-03-26 11:58:34 +01:00
structure.py fhdl: support len() on all values 2013-04-14 13:50:26 +02:00
tools.py fhdl: support len() on all values 2013-04-14 13:50:26 +02:00
tracer.py bank: automatic register naming 2013-03-12 15:45:24 +01:00
verilog.py fhdl/verilog/_printinit: initialize undriven Special inputs (bug reported by Florent Kermarrec) 2013-04-11 18:55:49 +02:00
visit.py fhdl/visit: add TransformModule 2013-04-10 23:42:14 +02:00