Florent Kermarrec 9509d9e361 gen/genlib/cdc/gearbox: fix possible pointers overlap by removing AsyncResetSynchronizers. ... read/write clocks don't have the same frequencies, using AsyncResetSynchronizers cause differents delay when releasing reset and can cause pointers overlap.		2017-07-24 13:39:08 +02:00
..
__init__.py	litex/gen: reintegrate migen with modifications to be able to simulate with vpi until all missing features of the new simulator are implemented	2015-11-13 14:44:16 +01:00
cdc.py	gen/genlib/cdc/gearbox: fix possible pointers overlap by removing AsyncResetSynchronizers.	2017-07-24 13:39:08 +02:00
coding.py	litex/gen: reintegrate migen with modifications to be able to simulate with vpi until all missing features of the new simulator are implemented	2015-11-13 14:44:16 +01:00
divider.py	litex/gen: reintegrate migen with modifications to be able to simulate with vpi until all missing features of the new simulator are implemented	2015-11-13 14:44:16 +01:00
fifo.py	merge migen 9a6fdea3 changes	2017-06-28 22:47:13 +02:00
fsm.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
io.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
misc.py	gen/genlib/misc: add BitSlip	2017-04-19 09:55:19 +02:00
record.py	soc/interconnect/stream: use reset_less attr of signal for payload and param	2017-06-28 23:10:45 +02:00
resetsync.py	litex/gen: reintegrate migen with modifications to be able to simulate with vpi until all missing features of the new simulator are implemented	2015-11-13 14:44:16 +01:00
roundrobin.py	litex/gen: reintegrate migen with modifications to be able to simulate with vpi until all missing features of the new simulator are implemented	2015-11-13 14:44:16 +01:00
sort.py	gen/build: merge with migen 0575c749e35a7180f0dca408e426af8eef22b568 and reintegrate migen simulator	2016-03-21 19:15:40 +01:00