litex/test
2020-02-06 17:58:01 +01:00
..
__init__.py
test_axi.py
test_bitbang.py
test_code_8b10b.py
test_csr.py
test_ecc.py
test_gearbox.py
test_hyperbus.py
test_i2s.py soc/cores/i2s: cleanup pass, rename to S7I2SSlave (since 7-Series specific for now), rename fifodepth to fifo_depth for consistency with others cores. 2020-02-06 17:00:04 +01:00
test_icap.py
test_packet.py
test_prbs.py
test_spi.py
test_spi_opi.py soc/cores/spi_opi: cleanup, rename to S7SPIOPI (since 7-Series specific for now) 2020-02-06 17:58:01 +01:00
test_stream.py interconnect/stream: add PipeValid and PipeWait to cut timing paths. 2020-01-29 18:27:29 +01:00
test_targets.py test/test_targets: limit max_sdram_size to 1GB 2020-01-17 13:24:45 +01:00