35 lines
951 B
Python
35 lines
951 B
Python
from migen.fhdl.std import *
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from migen.bank.description import *
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from misoclib.com.litepcie.common import *
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class SlaveInternalPort:
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def __init__(self, dw, address_decoder=None):
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self.address_decoder = address_decoder
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self.sink = Sink(completion_layout(dw))
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self.source = Source(request_layout(dw))
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class MasterInternalPort:
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def __init__(self, dw, channel=None, write_only=False, read_only=False):
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self.channel = channel
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self.write_only = write_only
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self.read_only = read_only
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self.sink = Sink(request_layout(dw))
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self.source = Source(completion_layout(dw))
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class SlavePort:
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def __init__(self, port):
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self.address_decoder = port.address_decoder
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self.sink = port.source
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self.source = port.sink
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class MasterPort:
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def __init__(self, port):
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self.channel = port.channel
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self.sink = port.source
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self.source = port.sink
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