62 lines
1.4 KiB
Python
62 lines
1.4 KiB
Python
import collections
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from migen.fhdl.std import *
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from migen.bank.description import *
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from migen.genlib.misc import optree
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from migen.genlib.cdc import MultiReg
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class CounterADC(Module, AutoCSR):
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def __init__(self, charge, sense, width=24):
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if not isinstance(sense, collections.Iterable):
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sense = [sense]
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channels = len(sense)
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self._start_busy = CSR()
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self._overflow = CSRStatus(channels)
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self._polarity = CSRStorage()
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count = Signal(width)
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busy = Signal(channels)
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res = []
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for i in range(channels):
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res.append(CSRStatus(width, name="res"+str(i)))
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setattr(self, "_res"+str(i), res[-1])
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any_busy = Signal()
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self.comb += [
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any_busy.eq(optree("|",
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[busy[i] for i in range(channels)])),
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self._start_busy.w.eq(any_busy)
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]
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carry = Signal()
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self.sync += [
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If(self._start_busy.re,
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count.eq(0),
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busy.eq((1 << channels)-1),
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self._overflow.status.eq(0),
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charge.eq(~self._polarity.storage)
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).Elif(any_busy,
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Cat(count, carry).eq(count + 1),
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If(carry,
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self._overflow.status.eq(busy),
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busy.eq(0)
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)
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).Else(
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charge.eq(self._polarity.storage)
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)
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]
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for i in range(channels):
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sense_synced = Signal()
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self.specials += MultiReg(sense[i], sense_synced)
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self.sync += If(busy[i],
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If(sense_synced != self._polarity.storage,
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res[i].status.eq(count),
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busy[i].eq(0)
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)
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)
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