156 lines
5.3 KiB
Verilog
156 lines
5.3 KiB
Verilog
// ==================================================================
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// >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
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// ------------------------------------------------------------------
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// Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
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// ALL RIGHTS RESERVED
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// ------------------------------------------------------------------
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//
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// IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
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//
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// Permission:
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//
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// Lattice Semiconductor grants permission to use this code
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// pursuant to the terms of the Lattice Semiconductor Corporation
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// Open Source License Agreement.
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//
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// Disclaimer:
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//
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// Lattice Semiconductor provides no warranty regarding the use or
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// functionality of this code. It is the user's responsibility to
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// verify the user's design for consistency and functionality through
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// the use of formal verification methods.
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//
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// --------------------------------------------------------------------
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//
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// Lattice Semiconductor Corporation
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// 5555 NE Moore Court
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// Hillsboro, OR 97214
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// U.S.A
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//
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// TEL: 1-800-Lattice (USA and Canada)
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// 503-286-8001 (other locations)
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//
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// web: http://www.latticesemi.com/
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// email: techsupport@latticesemi.com
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//
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// --------------------------------------------------------------------
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// FILE DETAILS
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// Project : LatticeMico32
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// File : lm32_shifter.v
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// Title : Barrel shifter
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// Dependencies : lm32_include.v
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// Version : 6.1.17
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// : Initial Release
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// Version : 7.0SP2, 3.0
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// : No Change
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// Version : 3.1
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// : No Change
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// =============================================================================
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`include "lm32_include.v"
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/////////////////////////////////////////////////////
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// Module interface
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/////////////////////////////////////////////////////
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module lm32_shifter (
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// ----- Inputs -------
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clk_i,
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rst_i,
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stall_x,
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direction_x,
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sign_extend_x,
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operand_0_x,
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operand_1_x,
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// ----- Outputs -------
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shifter_result_m
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);
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/////////////////////////////////////////////////////
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// Inputs
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/////////////////////////////////////////////////////
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input clk_i; // Clock
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input rst_i; // Reset
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input stall_x; // Stall instruction in X stage
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input direction_x; // Direction to shift
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input sign_extend_x; // Whether shift is arithmetic (1'b1) or logical (1'b0)
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input [`LM32_WORD_RNG] operand_0_x; // Operand to shift
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input [`LM32_WORD_RNG] operand_1_x; // Operand that specifies how many bits to shift by
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/////////////////////////////////////////////////////
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// Outputs
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/////////////////////////////////////////////////////
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output [`LM32_WORD_RNG] shifter_result_m; // Result of shift
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wire [`LM32_WORD_RNG] shifter_result_m;
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/////////////////////////////////////////////////////
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// Internal nets and registers
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/////////////////////////////////////////////////////
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reg direction_m;
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reg [`LM32_WORD_RNG] left_shift_result;
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reg [`LM32_WORD_RNG] right_shift_result;
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reg [`LM32_WORD_RNG] left_shift_operand;
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wire [`LM32_WORD_RNG] right_shift_operand;
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wire fill_value;
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wire [`LM32_WORD_RNG] right_shift_in;
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integer shift_idx_0;
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integer shift_idx_1;
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/////////////////////////////////////////////////////
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// Combinational Logic
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/////////////////////////////////////////////////////
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// Select operands - To perform a left shift, we reverse the bits and perform a right shift
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always @(*)
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begin
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for (shift_idx_0 = 0; shift_idx_0 < `LM32_WORD_WIDTH; shift_idx_0 = shift_idx_0 + 1)
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left_shift_operand[`LM32_WORD_WIDTH-1-shift_idx_0] = operand_0_x[shift_idx_0];
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end
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assign right_shift_operand = direction_x == `LM32_SHIFT_OP_LEFT ? left_shift_operand : operand_0_x;
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// Determine fill value for right shift - Sign bit for arithmetic shift, or zero for logical shift
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assign fill_value = (sign_extend_x == `TRUE) && (direction_x == `LM32_SHIFT_OP_RIGHT)
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? operand_0_x[`LM32_WORD_WIDTH-1]
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: 1'b0;
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// Determine bits to shift in for right shift or rotate
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assign right_shift_in = {`LM32_WORD_WIDTH{fill_value}};
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// Reverse bits to get left shift result
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always @(*)
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begin
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for (shift_idx_1 = 0; shift_idx_1 < `LM32_WORD_WIDTH; shift_idx_1 = shift_idx_1 + 1)
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left_shift_result[`LM32_WORD_WIDTH-1-shift_idx_1] = right_shift_result[shift_idx_1];
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end
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// Select result
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assign shifter_result_m = direction_m == `LM32_SHIFT_OP_LEFT ? left_shift_result : right_shift_result;
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/////////////////////////////////////////////////////
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// Sequential Logic
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/////////////////////////////////////////////////////
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// Perform right shift
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always @(posedge clk_i `CFG_RESET_SENSITIVITY)
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begin
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if (rst_i == `TRUE)
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begin
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right_shift_result <= {`LM32_WORD_WIDTH{1'b0}};
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direction_m <= `FALSE;
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end
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else
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begin
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if (stall_x == `FALSE)
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begin
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right_shift_result <= {right_shift_in, right_shift_operand} >> operand_1_x[`LM32_SHIFT_RNG];
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direction_m <= direction_x;
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end
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end
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end
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endmodule
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