litex/litex
Florent Kermarrec e5a7375b30 cores/clock/ECP5PLL: ensure ECP5PLL's locked is deasserted on reset.
It seems EHXPLLL does not loose locked when reseted.
2020-11-26 18:56:24 +01:00
..
boards symbiflow: remove workarounds for symbiflow 2020-11-23 10:33:11 +01:00
build Add Yosys/nextpnr-nexus/oxide flow for CrossLink-NX 2020-11-25 09:44:51 +00:00
gen gen/fhdl/verilog: improve clock domain error reporting. 2020-11-10 13:27:29 +01:00
soc cores/clock/ECP5PLL: ensure ECP5PLL's locked is deasserted on reset. 2020-11-26 18:56:24 +01:00
tools tools/comm_udp/litex_server: add --udp-scan args to scan network for available Etherbone/UDP devices. 2020-11-26 13:33:20 +01:00
__init__.py revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp). 2020-11-05 19:55:18 +01:00