David Jablonski e853ad4b61 fix uart startbit: 1 cycle later		2020-05-24 16:12:07 +02:00
..
cores	fix uart startbit: 1 cycle later	2020-05-24 16:12:07 +02:00
doc	soc/doc/csr: allow CSRField.reset to be a Migen Constant.	2020-03-23 18:47:41 +01:00
integration	integration/soc_core: avoid cpu_variant check if custom cpu_cls is passed.	2020-05-19 16:01:57 +02:00
interconnect	integration/soc: review/simplify changes for standalone cores.	2020-05-12 16:18:26 +02:00
software	software/libbase: remove linker-sdram (unused).	2020-05-18 23:35:48 +02:00
__init__.py	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00