109 lines
3.1 KiB
Python
109 lines
3.1 KiB
Python
# This file is Copyright (c) 2013 Florent Kermarrec <florent@enjoy-digital.fr>
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# License: BSD
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from mibuild.generic_platform import *
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from mibuild.crg import SimpleCRG
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from mibuild.altera.quartus import AlteraQuartusPlatform
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from mibuild.altera.programmer import USBBlaster
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_io = [
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("clk50", 0, Pins("R8"), IOStandard("3.3-V LVTTL")),
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("user_led", 0, Pins("A15"), IOStandard("3.3-V LVTTL")),
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("user_led", 1, Pins("A13"), IOStandard("3.3-V LVTTL")),
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("user_led", 2, Pins("B13"), IOStandard("3.3-V LVTTL")),
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("user_led", 3, Pins("A11"), IOStandard("3.3-V LVTTL")),
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("user_led", 4, Pins("D1"), IOStandard("3.3-V LVTTL")),
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("user_led", 5, Pins("F3"), IOStandard("3.3-V LVTTL")),
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("user_led", 6, Pins("B1"), IOStandard("3.3-V LVTTL")),
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("user_led", 7, Pins("L3"), IOStandard("3.3-V LVTTL")),
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("key", 0, Pins("J15"), IOStandard("3.3-V LVTTL")),
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("key", 1, Pins("E1"), IOStandard("3.3-V LVTTL")),
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("sw", 0, Pins("M1"), IOStandard("3.3-V LVTTL")),
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("sw", 1, Pins("T9"), IOStandard("3.3-V LVTTL")),
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("sw", 2, Pins("B9"), IOStandard("3.3-V LVTTL")),
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("sw", 3, Pins("M15"), IOStandard("3.3-V LVTTL")),
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("serial", 0,
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Subsignal("tx", Pins("D3"), IOStandard("3.3-V LVTTL")),
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Subsignal("rx", Pins("C3"), IOStandard("3.3-V LVTTL"))
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),
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("sdram_clock", 0, Pins("R4"), IOStandard("3.3-V LVTTL")),
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("sdram", 0,
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Subsignal("a", Pins("P2 N5 N6 M8 P8 T7 N8 T6 R1 P1 N2 N1 L4")),
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Subsignal("ba", Pins("M7 M6")),
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Subsignal("cs_n", Pins("P6")),
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Subsignal("cke", Pins("L7")),
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Subsignal("ras_n", Pins("L2")),
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Subsignal("cas_n", Pins("L1")),
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Subsignal("we_n", Pins("C2")),
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Subsignal("dq", Pins("G2 G1 L8 K5 K2 J2 J1 R7 T4 T2 T3 R3 R5 P3 N3 K1")),
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Subsignal("dm", Pins("R6","T5")),
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IOStandard("3.3-V LVTTL")
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),
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("epcs", 0,
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Subsignal("data0", Pins("H2")),
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Subsignal("dclk", Pins("H1")),
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Subsignal("ncs0", Pins("D2")),
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Subsignal("asd0", Pins("C1")),
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IOStandard("3.3-V LVTTL")
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),
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("i2c", 0,
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Subsignal("sclk", Pins("F2")),
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Subsignal("sdat", Pins("F1")),
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IOStandard("3.3-V LVTTL")
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),
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("g_sensor", 0,
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Subsignal("cs_n", Pins("G5")),
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Subsignal("int", Pins("M2")),
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IOStandard("3.3-V LVTTL")
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),
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("adc", 0,
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Subsignal("cs_n", Pins("A10")),
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Subsignal("saddr", Pins("B10")),
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Subsignal("sclk", Pins("B14")),
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Subsignal("sdat", Pins("A9")),
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IOStandard("3.3-V LVTTL")
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),
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("gpio_0", 0,
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Pins("D3 C3 A2 A3 B3 B4 A4 B5 A5 D5 B6 A6 B7 D6 A7 C6",
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"C8 E6 E7 D8 E8 F8 F9 E9 C9 D9 E11 E10 C11 B11 A12 D11",
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"D12 B12"),
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IOStandard("3.3-V LVTTL")
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),
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("gpio_1", 0,
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Pins("F13 T15 T14 T13 R13 T12 R12 T11 T10 R11 P11 R10 N12 P9 N9 N11",
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"L16 K16 R16 L15 P15 P16 R14 N16 N15 P14 L14 N14 M10 L13 J16 K15",
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"J13 J14"),
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IOStandard("3.3-V LVTTL")
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),
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("gpio_2", 0,
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Pins("A14 B16 C14 C16 C15 D16 D15 D14 F15 F16 F14 G16 G15"),
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IOStandard("3.3-V LVTTL")
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),
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]
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class Platform(AlteraQuartusPlatform):
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default_clk_name = "clk50"
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default_clk_period = 20
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def __init__(self):
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AlteraQuartusPlatform.__init__(self, "EP4CE22F17C6", _io,
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lambda p: SimpleCRG(p, "clk50", None))
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def create_programmer(self):
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return USBBlaster()
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def do_finalize(self, fragment):
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try:
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self.add_period_constraint(self.lookup_request("clk50"), 20)
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except ConstraintError:
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pass
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