litex/litex
Romain Dolbeau f310dd52f3 Fix interrupt issue with ethernet on recent Linux-On-Litex-Vexriscv/SMP
It seems an overreaching 'interrupt-parent' caused trouble to interrupt routing.
This moves 'interrupt-parent' to the SoC entry.
2021-04-15 10:06:53 +02:00
..
build Merge pull request #874 from chmousset/enh/ECP5DifferentialInput 2021-04-06 12:27:33 +02:00
compat compat/stream_sim: Remove TODO since will not be done. 2021-03-24 17:58:13 +01:00
gen gen/fhdl/verilog: improve clock domain error reporting. 2020-11-10 13:27:29 +01:00
soc software/liblitesdcard: Add SDCARD_CMD25_SUPPORT #define to allow disabling/enabling Multiple Block Writes and implement Multiple Block Writes. 2021-04-09 19:34:13 +02:00
tools Fix interrupt issue with ethernet on recent Linux-On-Litex-Vexriscv/SMP 2021-04-15 10:06:53 +02:00
__init__.py revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp). 2020-11-05 19:55:18 +01:00