litex/litex
Florent Kermarrec f31f9a20f0 boards: remove and switch to litex_boards.
Keeping board definition files directly in LiteX is no longer useful since we are already relying on board
definitions files from LiteX-Boards (https://github.com/litex-hub/litex-boards) in various benches/projects
and having definitions files directly in LiteX creates confusion/additional work.

For projects using board definition files from LiteX, the litex.boards import can just be replaced with litex_boards:

from litex.boards.platforms import kc705

from litex_boards.platforms import kc705
2021-01-04 14:09:35 +01:00
..
build Quartus: handle vh and svh files 2020-12-20 11:53:08 +01:00
gen gen/fhdl/verilog: improve clock domain error reporting. 2020-11-10 13:27:29 +01:00
soc Use riscv32 gcc triples for picorv32- superset of riscv64 triples. 2020-12-31 03:22:56 -05:00
tools tools/litex_json2dts/soc_controller: remove VexRiscv-SMP workaround now that we able to use upstream linux litex patches. 2020-12-29 12:25:38 +01:00
__init__.py revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp). 2020-11-05 19:55:18 +01:00