litex/migen
Sebastien Bourdeauducq f3ddfffc47 bank: refactoring 2012-02-06 13:55:50 +01:00
..
actorlib Use enumerate(x) instead of zip(range(x), x) 2012-02-02 21:28:00 +01:00
bank bank: refactoring 2012-02-06 13:55:50 +01:00
bus Remove explicit bus names and rely on the new automatic namer 2012-01-27 22:20:57 +01:00
corelogic Use enumerate(x) instead of zip(range(x), x) 2012-02-02 21:28:00 +01:00
fhdl fhdl/structure: binary constant builder 2012-02-05 19:32:11 +01:00
flow Use enumerate(x) instead of zip(range(x), x) 2012-02-02 21:28:00 +01:00
__init__.py Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00