This website requires JavaScript.
Explore
Help
Sign In
Hardware
/
litex
mirror of
https://github.com/enjoy-digital/litex.git
Watch
1
Star
0
Fork
You've already forked litex
0
Code
Issues
Packages
Projects
Releases
Wiki
Activity
f995e8b92e
litex
/
migen
/
bank
History
Sebastien Bourdeauducq
ef7aea0f31
bank: omit device write register when access_bus==READ_ONLY and access_dev==WRITE_ONLY
2012-02-15 18:23:31 +01:00
..
__init__.py
Cleanup
2011-12-05 19:25:32 +01:00
csrgen.py
bank: omit device write register when access_bus==READ_ONLY and access_dev==WRITE_ONLY
2012-02-15 18:23:31 +01:00
description.py
bank: omit device write register when access_bus==READ_ONLY and access_dev==WRITE_ONLY
2012-02-15 18:23:31 +01:00
eventmanager.py
Use double quotes for all strings
2012-02-14 13:12:43 +01:00