litex/litex/gen
2022-12-08 14:20:38 +01:00
..
fhdl gen/fhdl/module: Add add/get_module methods to simplify user design and avoid direct use of setattr/getattr. 2022-12-08 14:20:38 +01:00
sim gen/fhdl: Integrate namer from Migen to give us more flexibility on generated verilog names. 2022-05-06 16:04:24 +02:00
__init__.py litex/gen: Move LiteXModule to gen/fhdl/module.py. 2022-10-28 19:38:24 +02:00
common.py colorer: Avoid duplication and move it to litex/gen. 2022-11-03 09:49:51 +01:00