2015-06-06 08:01:37 -04:00
|
|
|
|
|
|
|
|
# vivado -nojournal -log synth_vivado.log -mode batch -source synth_vivado.tcl
|
|
|
|
|
|
2015-06-06 14:14:58 -04:00
|
|
|
read_verilog synth_vivado_soc.v
|
|
|
|
|
read_verilog ../picorv32.v
|
2015-06-06 08:01:37 -04:00
|
|
|
read_xdc synth_vivado.xdc
|
|
|
|
|
|
|
|
|
|
synth_design -part xc7a15t-csg324 -top picorv32_axi
|
2015-06-06 14:14:58 -04:00
|
|
|
# synth_design -part xc7a15t-csg324 -top test_soc
|
2015-06-06 08:01:37 -04:00
|
|
|
opt_design
|
|
|
|
|
place_design
|
|
|
|
|
route_design
|
|
|
|
|
|
|
|
|
|
report_utilization
|
|
|
|
|
report_timing
|
|
|
|
|
|
2015-06-06 14:14:58 -04:00
|
|
|
write_verilog -force synth_vivado_syn.v
|
2015-06-06 08:01:37 -04:00
|
|
|
|
