mirror of https://github.com/YosysHQ/picorv32.git
Merge pull request #89 from emilio93/patch-1
Update Risc-V website link for tools
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@ -6,7 +6,7 @@ PicoRV32 is a CPU core that implements the [RISC-V RV32IMC Instruction Set](http
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It can be configured as RV32E, RV32I, RV32IC, RV32IM, or RV32IMC core, and optionally
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contains a built-in interrupt controller.
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Tools (gcc, binutils, etc..) can be obtained via the [RISC-V Website](http://riscv.org/download.html#tab_tools).
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Tools (gcc, binutils, etc..) can be obtained via the [RISC-V Website](https://riscv.org/software-status/).
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The examples bundled with PicoRV32 expect various RV32 toolchains to be installed in `/opt/riscv32i[m][c]`. See
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the [build instructions below](#building-a-pure-rv32i-toolchain) for details.
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