Back to Vivado 2015.1

my synthesis license has a 2015.05 version limit..
This commit is contained in:
Clifford Wolf 2015-07-01 22:42:25 +02:00
parent 84e2202fef
commit 198c995c8f
2 changed files with 3 additions and 3 deletions

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@ -533,10 +533,10 @@ place&route static timing analysis with `report_timing`.
| Xilinx Virtex-7T | -3 | 2.4 ns (416 MHz) |
The following table lists the resource utilization in area-optimized synthesis,
as reported by Vivado 2015.2 post optimization with `report_utilization`.
as reported by Vivado 2015.1 post optimization with `report_utilization`.
PicoRV32 "small" is the core without counter instructions, with externally
latched `mem_rdata`, and without catching of misaligned memory access and
latched `mem_rdata`, and without catching of misaligned memory accesses and
illegal instructions.
PicoRV32 "regular" is simply the core with its default settings.

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@ -1,5 +1,5 @@
export VIVADO = /opt/Xilinx/Vivado/2015.2/bin/vivado
export VIVADO = /opt/Xilinx/Vivado/2015.1/bin/vivado
help:
@echo "Usage: make {synth_speed|synth_area|synth_soc}"