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Use RV32IC in scripts/torture/

This commit is contained in:
Clifford Wolf 2016-04-08 22:28:30 +02:00
parent df25ba5831
commit 24b299597a
3 changed files with 3 additions and 2 deletions
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2
scripts/torture/Makefile
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@ -41,7 +41,7 @@ tests/test_$(1).S: tests/generated.ok
mv riscv-torture/output/test_$(1).S tests/ mv riscv-torture/output/test_$(1).S tests/
tests/test_$(1).elf: tests/test_$(1).S tests/test_$(1).elf: tests/test_$(1).S
riscv32-unknown-elf-gcc -m32 -ffreestanding -nostdlib -Wl,-Bstatic,-T,sections.lds -I. -o tests/test_$(1).elf tests/test_$(1).S riscv32-unknown-elf-gcc -m32 -march=RV32IC -ffreestanding -nostdlib -Wl,-Bstatic,-T,sections.lds -I. -o tests/test_$(1).elf tests/test_$(1).S
tests/test_$(1).bin: tests/test_$(1).elf tests/test_$(1).bin: tests/test_$(1).elf
riscv32-unknown-elf-objcopy -O binary tests/test_$(1).elf tests/test_$(1).bin riscv32-unknown-elf-objcopy -O binary tests/test_$(1).elf tests/test_$(1).bin

2
scripts/torture/test.sh
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@ -15,7 +15,7 @@ fi
## Compile test case and create reference ## Compile test case and create reference
riscv32-unknown-elf-gcc -m32 -ffreestanding -nostdlib -Wl,-Bstatic,-T,sections.lds -o test.elf test.S riscv32-unknown-elf-gcc -m32 -march=RV32IC -ffreestanding -nostdlib -Wl,-Bstatic,-T,sections.lds -o test.elf test.S
LD_LIBRARY_PATH="./riscv-isa-sim:./riscv-fesvr" ./riscv-isa-sim/spike test.elf > test.ref LD_LIBRARY_PATH="./riscv-isa-sim:./riscv-fesvr" ./riscv-isa-sim/spike test.elf > test.ref
riscv32-unknown-elf-objcopy -O binary test.elf test.bin riscv32-unknown-elf-objcopy -O binary test.elf test.bin
python3 ../../firmware/makehex.py test.bin 4096 > test.hex python3 ../../firmware/makehex.py test.bin 4096 > test.hex

1
scripts/torture/testbench.v
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@ -19,6 +19,7 @@ module testbench (
reg [31:0] mem_rdata; reg [31:0] mem_rdata;
picorv32 #( picorv32 #(
.COMPRESSED_ISA(1)
) uut ( ) uut (
.clk (clk ), .clk (clk ),
.resetn (resetn ), .resetn (resetn ),