mirror of https://github.com/YosysHQ/picorv32.git
Do not peek into core for cycle count in WB testbench
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
parent
f3a42746ca
commit
3d36751b88
|
@ -70,10 +70,13 @@ module picorv32_wrapper #(
|
|||
reg [31:0] irq;
|
||||
wire mem_instr;
|
||||
|
||||
reg [15:0] count_cycle = 0;
|
||||
always @(posedge wb_clk) count_cycle <= !wb_rst ? count_cycle + 1 : 0;
|
||||
|
||||
always @* begin
|
||||
irq = 0;
|
||||
irq[4] = &uut.picorv32_core.count_cycle[12:0];
|
||||
irq[5] = &uut.picorv32_core.count_cycle[15:0];
|
||||
irq[4] = &count_cycle[12:0];
|
||||
irq[5] = &count_cycle[15:0];
|
||||
end
|
||||
|
||||
wire [31:0] wb_m2s_adr;
|
||||
|
|
Loading…
Reference in New Issue