synth_speed

This commit is contained in:
Tom Verbeure 2016-08-30 23:02:31 -07:00
parent 91deccd3a1
commit 41918ee265
3 changed files with 6 additions and 13 deletions

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set_global_assignment -name DEVICE ep4ce40f29c7
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name TOP_LEVEL_ENTITY picorv32_axi
set_global_assignment -name VERILOG_FILE ../../../picorv32.v
set_global_assignment -name SDC_FILE ../synth_speed.sdc

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create_clock -period 2.5 [get_ports clk]

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read_verilog ../../picorv32.v
read_xdc synth_speed.xdc
synth_design -part xc7k70t-fbg676 -top picorv32_axi
opt_design
place_design
phys_opt_design
route_design
report_utilization
report_timing