mirror of https://github.com/YosysHQ/picorv32.git
synth_speed
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set_global_assignment -name DEVICE ep4ce40f29c7
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name TOP_LEVEL_ENTITY picorv32_axi
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set_global_assignment -name VERILOG_FILE ../../../picorv32.v
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set_global_assignment -name SDC_FILE ../synth_speed.sdc
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create_clock -period 2.5 [get_ports clk]
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read_verilog ../../picorv32.v
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read_xdc synth_speed.xdc
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synth_design -part xc7k70t-fbg676 -top picorv32_axi
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opt_design
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place_design
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phys_opt_design
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route_design
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report_utilization
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report_timing
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