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Added "picorv32_pcpi_div" module to README.md

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Clifford Wolf 2016-04-12 18:23:32 +02:00
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@ -91,6 +91,7 @@ This Verilog file contains the following Verilog modules:
| `picorv32_axi` | The version of the CPU with AXI4-Lite interface |
| `picorv32_axi_adapter` | Adapter from PicoRV32 Memory Interface to AXI4-Lite |
| `picorv32_pcpi_mul` | A PCPI core that implements the `MUL[H[SU|U]]` instructions |
| `picorv32_pcpi_div` | A PCPI core that implements the `DIV[U]/REM[U]` instructions |
Simply copy this file into your project.