Add STACKADDR parameter to picorv32_axi module

Signed-off-by: Oguz Meteer <info@guztech.nl>
This commit is contained in:
Oguz Meteer 2017-01-15 14:49:01 +01:00
parent f5d146c2f1
commit 510d4de1b1
1 changed files with 4 additions and 2 deletions

View File

@ -2311,7 +2311,8 @@ module picorv32_axi #(
parameter [31:0] MASKED_IRQ = 32'h 0000_0000, parameter [31:0] MASKED_IRQ = 32'h 0000_0000,
parameter [31:0] LATCHED_IRQ = 32'h ffff_ffff, parameter [31:0] LATCHED_IRQ = 32'h ffff_ffff,
parameter [31:0] PROGADDR_RESET = 32'h 0000_0000, parameter [31:0] PROGADDR_RESET = 32'h 0000_0000,
parameter [31:0] PROGADDR_IRQ = 32'h 0000_0010 parameter [31:0] PROGADDR_IRQ = 32'h 0000_0010,
parameter [31:0] STACKADDR = 32'h 0000_0fff
) ( ) (
input clk, resetn, input clk, resetn,
output trap, output trap,
@ -2419,7 +2420,8 @@ module picorv32_axi #(
.MASKED_IRQ (MASKED_IRQ ), .MASKED_IRQ (MASKED_IRQ ),
.LATCHED_IRQ (LATCHED_IRQ ), .LATCHED_IRQ (LATCHED_IRQ ),
.PROGADDR_RESET (PROGADDR_RESET ), .PROGADDR_RESET (PROGADDR_RESET ),
.PROGADDR_IRQ (PROGADDR_IRQ ) .PROGADDR_IRQ (PROGADDR_IRQ ),
.STACKADDR (STACKADDR )
) picorv32_core ( ) picorv32_core (
.clk (clk ), .clk (clk ),
.resetn (resetn), .resetn (resetn),