mirror of https://github.com/YosysHQ/picorv32.git
Fixed catching jumps to misaligned insn
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17c7da49f4
commit
54a8e4b311
16
picorv32.v
16
picorv32.v
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@ -1564,7 +1564,7 @@ module picorv32 #(
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latched_branch <= 1;
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latched_store <= 1;
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`debug($display("LD_RS1: %2d 0x%08x", decoded_rs1, cpuregs_rs1);)
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reg_out <= cpuregs_rs1;
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reg_out <= CATCH_MISALIGN ? (cpuregs_rs1 & 32'h fffffffe) : cpuregs_rs1;
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dbg_rs1val <= cpuregs_rs1;
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dbg_rs1val_valid <= 1;
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cpu_state <= cpu_state_fetch;
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@ -1849,12 +1849,14 @@ module picorv32 #(
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irq_pending <= next_irq_pending & ~MASKED_IRQ;
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if (COMPRESSED_ISA) begin
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reg_pc[0] <= 0;
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reg_next_pc[0] <= 0;
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end else begin
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reg_pc[1:0] <= 0;
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reg_next_pc[1:0] <= 0;
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if (!CATCH_MISALIGN) begin
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if (COMPRESSED_ISA) begin
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reg_pc[0] <= 0;
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reg_next_pc[0] <= 0;
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end else begin
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reg_pc[1:0] <= 0;
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reg_next_pc[1:0] <= 0;
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end
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end
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current_pc = 'bx;
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end
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