Merge branch 'master' into compressed

This commit is contained in:
Clifford Wolf 2016-04-09 12:52:26 +02:00
commit 55c4c3b102
3 changed files with 55 additions and 7 deletions

4
.gitignore vendored
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@ -14,6 +14,10 @@
/dhrystone/timing.txt
/dhrystone/*.d
/dhrystone/*.o
/riscv-gnu-toolchain-riscv32i
/riscv-gnu-toolchain-riscv32ic
/riscv-gnu-toolchain-riscv32im
/riscv-gnu-toolchain-riscv32imc
/testbench.exe
/testbench_sp.exe
/testbench_axi.exe

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@ -1,9 +1,14 @@
RISCV_GNU_TOOLCHAIN_REV = 3134bf4
GCC_URL = http://mirrors.kernel.org/gnu/gcc/gcc-5.3.0/gcc-5.3.0.tar.gz
NEWLIB_URL = ftp://sourceware.org/pub/newlib/newlib-2.2.0.tar.gz
BINUTILS_URL = http://mirrors.kernel.org/gnu/binutils/binutils-2.26.tar.gz
TEST_OBJS = $(addsuffix .o,$(basename $(wildcard tests/*.S)))
FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.o firmware/multest.o firmware/stats.o
GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings
GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion
TOOLCHAIN_PREFIX = riscv32-unknown-elf-
TOOLCHAIN_PREFIX = /opt/riscv32i/bin/riscv32-unknown-elf-
# COMPRESSED_ISA = C
test: testbench.exe firmware/firmware.hex
@ -71,13 +76,38 @@ tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \
-DTEST_FUNC_TXT='"$(notdir $(basename $<))"' -DTEST_FUNC_RET=$(notdir $(basename $<))_ret $<
download-tools:
sudo bash -c 'set -ex; mkdir -p /var/cache/distfiles; $(foreach URL,$(GCC_URL) $(NEWLIB_URL) $(BINUTILS_URL), \
if ! test -f /var/cache/distfiles/$(notdir $(URL)); then wget -O /var/cache/distfiles/$(notdir $(URL)).part $(URL); \
mv /var/cache/distfiles/$(notdir $(URL)).part /var/cache/distfiles/$(notdir $(URL)); fi;)'
define build_tools_template
build-$(1)-tools:
@read -p "This will remove all existing data from /opt/$(1). Type YES to continue: " reply && [[ "$$$$reply" == [Yy][Ee][Ss] || "$$$$reply" == [Yy] ]]
sudo bash -c "set -ex; rm -rf /opt/$(1); mkdir -p /opt/$(1); chown $$$${USER}. /opt/$(1)"
set -ex; if ! test -d riscv-gnu-toolchain-$(1); then git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-$(1); \
else cd riscv-gnu-toolchain-$(1); git checkout master; git pull; fi
set -ex; cd riscv-gnu-toolchain-$(1); rm -rf build; git checkout $(RISCV_GNU_TOOLCHAIN_REV); mkdir -p build
set -ex; cd riscv-gnu-toolchain-$(1)/build; ../configure --with-xlen=32 --with-arch=$(2) --prefix=/opt/$(1) --disable-float --disable-atomic
+set -ex; cd riscv-gnu-toolchain-$(1)/build; make
.PHONY: build-$(1)-tools
endef
$(eval $(call build_tools_template,riscv32i,I))
$(eval $(call build_tools_template,riscv32ic,IC))
$(eval $(call build_tools_template,riscv32im,IM))
$(eval $(call build_tools_template,riscv32imc,IMC))
toc:
gawk '/^-+$$/ { y=tolower(x); gsub("[^a-z0-9]+", "-", y); gsub("-$$", "", y); printf("- [%s](#%s)\n", x, y); } { x=$$0; }' README.md
clean:
rm -rf riscv-gnu-toolchain-riscv32i riscv-gnu-toolchain-riscv32ic \
riscv-gnu-toolchain-riscv32im riscv-gnu-toolchain-riscv32imc
rm -vrf $(FIRMWARE_OBJS) $(TEST_OBJS) check.smt2 check.vcd synth.v synth.log \
firmware/firmware.elf firmware/firmware.bin firmware/firmware.hex firmware/firmware.map \
testbench.exe testbench_sp.exe testbench_synth.exe testbench.vcd
.PHONY: test view test_sp test_axi test_synth toc clean
.PHONY: test view test_sp test_axi test_synth download-tools toc clean

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@ -537,17 +537,31 @@ pure RV32I target, and install it in `/opt/riscv32i`:
git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
cd riscv-gnu-toolchain-rv32i
git checkout acfa480
git checkout 3134bf4
mkdir build; cd build
../configure --with-xlen=32 --with-arch=I --prefix=/opt/riscv32i
../configure --with-xlen=32 --with-arch=I --prefix=/opt/riscv32i --disable-float --disable-atomic
make -j$(nproc)
The commands will all be named using the prefix `riscv32-unknown-elf-`, which
makes it easy to install them side-by-side with the regular riscv-tools, which
are using the name prefix `riscv64-unknown-elf-` by default.
makes it easy to install them side-by-side with the regular riscv-tools (those
are using the name prefix `riscv64-unknown-elf-` by default).
*Note: This instructions are for git rev acfa480 (2016-04-06) of riscv-gnu-toolchain.*
The following make targets build toolchains for `RV32I[M][C]` using this sequence
of commands (not including installing prerequisites):
| Command | Install Directory | ISA |
|:---------------------------------------- |:------------------ |:-------- |
| `make -j$(nproc) build-riscv32i-tools` | `/opt/riscv32i/` | `RV32I` |
| `make -j$(nproc) build-riscv32ic-tools` | `/opt/riscv32ic/` | `RV32IC` |
| `make -j$(nproc) build-riscv32im-tools` | `/opt/riscv32im/` | `RV32IM` |
| `make -j$(nproc) build-riscv32imc-tools` | `/opt/riscv32imc/` | `RV32IMC` |
By default calling any of those make targets will (re-)download the toolchain
sources. Run `make download-tools` to download the sources to `/var/cache/distfiles/`
once in advance.
*Note: This instructions are for git rev 3134bf4 (2016-04-08) of riscv-gnu-toolchain.*
Evaluation: Timing and Utilization on Xilinx 7-Series FPGAs