mirror of https://github.com/YosysHQ/picorv32.git
Add icebreaker example PicoSoC implementation
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf
parent
1afe3af452
commit
68c69136b9
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@ -1,8 +1,5 @@
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/spiflash_tb.vcd
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/spiflash_tb.vvp
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/firmware.elf
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/firmware.hex
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/firmware.bin
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/hx8kdemo.asc
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/hx8kdemo.bin
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/hx8kdemo.blif
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@ -11,6 +8,9 @@
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/hx8kdemo_syn.v
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/hx8kdemo_syn_tb.vvp
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/hx8kdemo_tb.vvp
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/hx8kdemo_fw.elf
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/hx8kdemo_fw.hex
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/hx8kdemo_fw.bin
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/icebreaker.asc
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/icebreaker.bin
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/icebreaker.json
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@ -19,5 +19,8 @@
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/icebreaker_syn.v
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/icebreaker_syn_tb.vvp
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/icebreaker_tb.vvp
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/icebreaker_fw.elf
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/icebreaker_fw.hex
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/icebreaker_fw.bin
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/testbench.vcd
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/cmos.log
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@ -33,6 +33,15 @@ hx8kprog: hx8kdemo.bin firmware.bin
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hx8kprog_fw: firmware.bin
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iceprog -o 1M firmware.bin
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hx8kdemo_fw.elf: sections.lds start.s firmware.c
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riscv32-unknown-elf-gcc -DHX8KDEMO -march=rv32imc -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o hx8kdemo_fw.elf start.s firmware.c
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hx8kdemo_fw.hex: hx8kdemo_fw.elf
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riscv32-unknown-elf-objcopy -O verilog hx8kdemo_fw.elf hx8kdemo_fw.hex
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hx8kdemo_fw.bin: hx8kdemo_fw.elf
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riscv32-unknown-elf-objcopy -O binary hx8kdemo_fw.elf hx8kdemo_fw.bin
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# ---- iCE40 IceBreaker Board ----
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icebsim: icebreaker_tb.vvp firmware.hex
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@ -60,23 +69,21 @@ icebreaker.bin: icebreaker.asc
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icetime -d up5k -c 12 -mtr icebreaker.rpt icebreaker.asc
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icepack icebreaker.asc icebreaker.bin
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icebprog: icebreaker.bin firmware.bin
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icebprog: icebreaker.bin icebreaker_fw.bin
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iceprog icebreaker.bin
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iceprog -o 1M firmware.bin
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iceprog -o 1M icebreaker_fw.bin
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icebprog_fw: firmware.bin
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iceprog -o 1M firmware.bin
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icebprog_fw: icebreaker_fw.bin
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iceprog -o 1M icebreaker_fw.bin
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# ---- Example Firmware ----
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icebreaker_fw.elf: sections.lds start.s firmware.c
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riscv32-unknown-elf-gcc -DICEBREAKER -march=rv32ic -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o icebreaker_fw.elf start.s firmware.c
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firmware.elf: sections.lds start.s firmware.c
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riscv32-unknown-elf-gcc -march=rv32ic -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf start.s firmware.c
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icebreaker_fw.hex: icebreaker_fw.elf
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riscv32-unknown-elf-objcopy -O verilog icebreaker_fw.elf icebreaker_fw.hex
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firmware.hex: firmware.elf
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riscv32-unknown-elf-objcopy -O verilog firmware.elf firmware.hex
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firmware.bin: firmware.elf
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riscv32-unknown-elf-objcopy -O binary firmware.elf firmware.bin
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icebreaker_fw.bin: icebreaker_fw.elf
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riscv32-unknown-elf-objcopy -O binary icebreaker_fw.elf icebreaker_fw.bin
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# ---- Testbench for SPI Flash Model ----
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@ -95,7 +102,8 @@ cmos.log: spimemio.v simpleuart.v picosoc.v ../picorv32.v
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clean:
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rm -f testbench.vvp testbench.vcd spiflash_tb.vvp spiflash_tb.vcd
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rm -f firmware.elf firmware.hex firmware.bin cmos.log
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rm -f hx8kdemo_fw.elf hx8kdemo_fw.hex hx8kdemo_fw.bin cmos.log
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rm -f icebreaker_fw.elf icebreaker_fw.hex icebreaker_fw.bin
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rm -f hx8kdemo.blif hx8kdemo.log hx8kdemo.asc hx8kdemo.rpt hx8kdemo.bin
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rm -f hx8kdemo_syn.v hx8kdemo_syn_tb.vvp hx8kdemo_tb.vvp
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rm -f icebreaker.json icebreaker.log icebreaker.asc icebreaker.rpt icebreaker.bin
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@ -20,13 +20,16 @@ The reset vector is set to 0x00100000, i.e. at 1MB into in the flash memory.
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See the included demo firmware and linker script for how to build a firmware
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image for this system.
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Run `make test` to run the test bench (and create `testbench.vcd`).
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Run `make hx8ksim` or `make icebsim` to run the test bench (and create `testbench.vcd`).
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Run `make prog` to build the configuration bit-stream and firmware images
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Run `make hx8kprog` to build the configuration bit-stream and firmware images
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and upload them to a connected iCE40-HX8K Breakout Board.
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Run `make icebprog` to build the configuration bit-stream and firmware images
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and upload them to a connected iCEBreaker Board.
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| File | Description |
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| ----------------------------- | --------------------------------------------------------------- |
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| --------------------------------- | --------------------------------------------------------------- |
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| [picosoc.v](picosoc.v) | Top-level PicoSoC Verilog module |
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| [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash |
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| [simpleuart.v](simpleuart.v) | Simple UART core connected directly to SoC TX/RX lines |
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@ -35,6 +38,10 @@ and upload them to a connected iCE40-HX8K Breakout Board.
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| [sections.lds](sections.lds) | Linker script for firmware.hex/firmware.bin |
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| [hx8kdemo.v](hx8kdemo.v) | FPGA-based example implementation on iCE40-HX8K Breakout Board |
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| [hx8kdemo.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCE40-HX8K Breakout Board |
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| [hx8kdemo\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCE40-HX8K Breakout Board |
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| [icebreaker.v](hx8kdemo.v) | FPGA-based example implementation on iCEBreaker Board |
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| [icebreaker.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCEBreaker Board |
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| [icebreaker\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCEBreaker Board |
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### Memory map:
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@ -1,6 +1,29 @@
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/*
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#if !defined(ICEBREAKER) && !defined(HX8KDEMO)
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# error "Set -DICEBREAKER or -DHX8KDEMO when compiling firmware.c"
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#endif
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// a pointer to this is a null pointer, but the compiler does not
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// know that because "sram" is a linker symbol from sections.lds.
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extern uint32_t sram;
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@ -28,11 +51,10 @@ void flashio(uint8_t *data, int len, uint8_t wrencmd)
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((void(*)(uint8_t*, uint32_t, uint32_t))func)(data, len, wrencmd);
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}
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#ifdef HX8KBOARD
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void set_flash_qspi_flag()
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{
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uint8_t buffer[8];
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#if 1
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uint32_t addr_cr1v = 0x800002;
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// Read Any Register (RDAR 65h)
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@ -52,26 +74,26 @@ void set_flash_qspi_flag()
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buffer[3] = addr_cr1v;
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buffer[4] = cr1v | 2; // Enable QSPI
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flashio(buffer, 5, 0x06);
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#else
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// Read Status Register 1 (RDSR1 05h)
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buffer[0] = 0x05;
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buffer[1] = 0x00; // rdata
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flashio(buffer, 2, 0);
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uint8_t sr1v = buffer[1];
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}
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#endif
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#ifdef ICEBREAKER
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void set_flash_qspi_flag()
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{
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uint8_t buffer[8];
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// Read Configuration Registers (RDCR1 35h)
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buffer[0] = 0x35;
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buffer[1] = 0x00; // rdata
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flashio(buffer, 2, 0);
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uint8_t cr1v = buffer[1];
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uint8_t sr2 = buffer[1];
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// Write Enable (WREN 06h) + Write Registers (WRR 01h)
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buffer[0] = 0x01;
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buffer[1] = sr1v;
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buffer[2] = cr1v | 2; // Enable QSPI
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flashio(buffer, 3, 0x06);
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#endif
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// Write Enable Volatile (50h) + Write Status Register 2 (31h)
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buffer[0] = 0x31;
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buffer[1] = sr2 | 2; // Enable QSPI
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flashio(buffer, 2, 0x50);
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}
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#endif
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void set_flash_latency(uint8_t value)
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{
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@ -185,6 +207,7 @@ void cmd_read_flash_id()
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// --------------------------------------------------------
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#ifdef HX8KDEMO
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uint8_t cmd_read_flash_regs_print(uint32_t addr, const char *name)
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{
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set_flash_latency(8);
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@ -213,6 +236,70 @@ void cmd_read_flash_regs()
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uint8_t cr3v = cmd_read_flash_regs_print(0x800004, "CR3V");
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uint8_t vdlp = cmd_read_flash_regs_print(0x800005, "VDLP");
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}
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#endif
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#ifdef ICEBREAKER
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uint8_t cmd_read_flash_reg(uint8_t cmd)
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{
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set_flash_latency(8);
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uint8_t buffer[2] = {cmd, 0};
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flashio(buffer, 2, 0);
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return buffer[1];
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}
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void print_reg_bit(int val, const char *name)
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{
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for (int i = 0; i < 12; i++) {
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if (*name == 0)
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putchar(' ');
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else
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putchar(*(name++));
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}
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putchar(val ? '1' : '0');
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putchar('\n');
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}
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void cmd_read_flash_regs()
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{
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putchar('\n');
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uint8_t sr1 = cmd_read_flash_reg(0x05);
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uint8_t sr2 = cmd_read_flash_reg(0x35);
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uint8_t sr3 = cmd_read_flash_reg(0x15);
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print_reg_bit(sr1 & 0x01, "S0 (BUSY)");
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print_reg_bit(sr1 & 0x02, "S1 (WEL)");
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print_reg_bit(sr1 & 0x04, "S2 (BP0)");
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print_reg_bit(sr1 & 0x08, "S3 (BP1)");
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print_reg_bit(sr1 & 0x10, "S4 (BP2)");
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print_reg_bit(sr1 & 0x20, "S5 (TB)");
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print_reg_bit(sr1 & 0x40, "S6 (SEC)");
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print_reg_bit(sr1 & 0x80, "S7 (SRP)");
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putchar('\n');
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print_reg_bit(sr2 & 0x01, "S8 (SRL)");
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print_reg_bit(sr2 & 0x02, "S9 (QE)");
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print_reg_bit(sr2 & 0x04, "S10 ----");
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print_reg_bit(sr2 & 0x08, "S11 (LB1)");
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print_reg_bit(sr2 & 0x10, "S12 (LB2)");
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print_reg_bit(sr2 & 0x20, "S13 (LB3)");
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print_reg_bit(sr2 & 0x40, "S14 (CMP)");
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print_reg_bit(sr2 & 0x80, "S15 (SUS)");
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putchar('\n');
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print_reg_bit(sr3 & 0x01, "S16 ----");
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print_reg_bit(sr3 & 0x02, "S17 ----");
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print_reg_bit(sr3 & 0x04, "S18 (WPS)");
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print_reg_bit(sr3 & 0x08, "S19 ----");
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print_reg_bit(sr3 & 0x10, "S20 ----");
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print_reg_bit(sr3 & 0x20, "S21 (DRV0)");
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print_reg_bit(sr3 & 0x40, "S22 (DRV1)");
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print_reg_bit(sr3 & 0x80, "S23 (HOLD)");
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putchar('\n');
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}
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#endif
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// --------------------------------------------------------
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@ -483,4 +570,3 @@ void main()
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}
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}
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}
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@ -32,6 +32,9 @@
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// Cypress S25FL064L http://www.cypress.com/file/316661/download
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// Cypress S25FL128L http://www.cypress.com/file/316171/download
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//
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// SPI flash used on iCEBreaker board:
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// https://www.winbond.com/resource-files/w25q128jv%20dtr%20revb%2011042016.pdf
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//
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module spiflash (
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input csb,
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