mirror of https://github.com/YosysHQ/picorv32.git
Rename decoded_imm_uj to decoded_imm_j
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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picorv32.v
12
picorv32.v
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@ -637,7 +637,7 @@ module picorv32 #(
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wire instr_trap;
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reg [regindex_bits-1:0] decoded_rd, decoded_rs1, decoded_rs2;
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reg [31:0] decoded_imm, decoded_imm_uj;
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reg [31:0] decoded_imm, decoded_imm_j;
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reg decoder_trigger;
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reg decoder_trigger_q;
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reg decoder_pseudo_trigger;
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@ -859,7 +859,7 @@ module picorv32 #(
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is_alu_reg_imm <= mem_rdata_latched[6:0] == 7'b0010011;
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is_alu_reg_reg <= mem_rdata_latched[6:0] == 7'b0110011;
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{ decoded_imm_uj[31:20], decoded_imm_uj[10:1], decoded_imm_uj[11], decoded_imm_uj[19:12], decoded_imm_uj[0] } <= $signed({mem_rdata_latched[31:12], 1'b0});
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{ decoded_imm_j[31:20], decoded_imm_j[10:1], decoded_imm_j[11], decoded_imm_j[19:12], decoded_imm_j[0] } <= $signed({mem_rdata_latched[31:12], 1'b0});
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decoded_rd <= mem_rdata_latched[11:7];
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decoded_rs1 <= mem_rdata_latched[19:15];
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@ -878,8 +878,8 @@ module picorv32 #(
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decoded_rs1 <= 0;
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decoded_rs2 <= 0;
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{ decoded_imm_uj[31:11], decoded_imm_uj[4], decoded_imm_uj[9:8], decoded_imm_uj[10], decoded_imm_uj[6],
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decoded_imm_uj[7], decoded_imm_uj[3:1], decoded_imm_uj[5], decoded_imm_uj[0] } <= $signed({mem_rdata_latched[12:2], 1'b0});
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{ decoded_imm_j[31:11], decoded_imm_j[4], decoded_imm_j[9:8], decoded_imm_j[10], decoded_imm_j[6],
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decoded_imm_j[7], decoded_imm_j[3:1], decoded_imm_j[5], decoded_imm_j[0] } <= $signed({mem_rdata_latched[12:2], 1'b0});
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case (mem_rdata_latched[1:0])
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2'b00: begin // Quadrant 0
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@ -1100,7 +1100,7 @@ module picorv32 #(
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(* parallel_case *)
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case (1'b1)
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instr_jal:
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decoded_imm <= decoded_imm_uj;
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decoded_imm <= decoded_imm_j;
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|{instr_lui, instr_auipc}:
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decoded_imm <= mem_rdata_q[31:12] << 12;
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|{instr_jalr, is_lb_lh_lw_lbu_lhu, is_alu_reg_imm}:
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@ -1545,7 +1545,7 @@ module picorv32 #(
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end
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if (instr_jal) begin
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mem_do_rinst <= 1;
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reg_next_pc <= current_pc + decoded_imm_uj;
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reg_next_pc <= current_pc + decoded_imm_j;
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latched_branch <= 1;
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end else begin
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mem_do_rinst <= 0;
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