mirror of https://github.com/YosysHQ/picorv32.git
Added misisng MUL_CLKGATE stage
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@ -1968,15 +1968,14 @@ module picorv32_pcpi_fast_mul #(
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rs1_q <= rs1;
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rs2_q <= rs2;
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end
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if (!MUL_CLKGATE || active[1]) begin
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rd <= $signed(EXTRA_MUL_FFS ? rs1_q : rs1) * $signed(EXTRA_MUL_FFS ? rs2_q : rs2);
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end
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if (!MUL_CLKGATE || active[2]) begin
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rd_q <= rd;
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end
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end
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always @(posedge clk) begin
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rd <= $signed(EXTRA_MUL_FFS ? rs1_q : rs1) * $signed(EXTRA_MUL_FFS ? rs2_q : rs2);
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end
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always @(posedge clk) begin
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if (instr_any_mul && !(EXTRA_MUL_FFS ? active[3:0] : active[1:0])) begin
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if (instr_rs1_signed)
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