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Updated README
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README.md
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README.md
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@ -13,7 +13,7 @@ PicoRV32 is free and open hardware licensed under the [ISC license](http://en.wi
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Features and Typical Applications:
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----------------------------------
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- Small (about 1000 LUTs in a 7-Series Xilinx FGPA)
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- Small (~1000 LUTs in a 7-Series Xilinx FGPA)
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- High fMAX (>250 MHz on 7-Series Xilinx FGPAs)
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- Selectable native memory interface or AXI4-Lite master
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@ -46,12 +46,22 @@ interface, and communicating with the outside world via AXI4.
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Performance:
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------------
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The average Cycles per Instruction (CPI) is 6 to 8, depending on the
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application code. (Most instructions, including unconditional branches and
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not-taken conditional branches execute in 5 cycles. Memory load/store, taken
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conditional branches, JALR, and shift operations may take more than 5 cycles.)
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The average Cycles per Instruction (CPI) is 5 to 7, depending on the
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mix of instructions in the code. The CPI for the individual instructions is:
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Dhrystone benchmark results: 0.124 DMIPS/MHz (219 Dhrystones/Second/MHz)
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| Instruction | CPI |
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| ------------------- | ---:|
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| ALU reg + immediate | 4 |
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| ALU reg + reg | 5 |
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| memory load | 7 |
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| memory store | 8 |
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| branch, taken | 8 |
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| branch, not taken | 5 |
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| shift operations | 5+ |
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Dhrystone benchmark results: 0.146 DMIPS/MHz (258 Dhrystones/Second/MHz)
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For the Dryhstone benchmark the average CPI is 6.181.
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*This numbers apply for setups with memory that can accomodate requests within
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one clock cycle. Slower memory will degrade the performance of the processor.*
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