mirror of https://github.com/YosysHQ/picorv32.git
Some testbench-related improvements
Patch by Larry Doolittle
This commit is contained in:
parent
9d3b0a9692
commit
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11
Makefile
11
Makefile
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@ -1,10 +1,17 @@
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TEST_OBJS = $(addsuffix .o,$(basename $(wildcard tests/*.S)))
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TEST_OBJS = $(addsuffix .o,$(basename $(wildcard tests/*.S)))
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FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.o firmware/multest.o firmware/stats.o
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FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.o firmware/multest.o firmware/stats.o
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GCC_WARNS = -Wall -Wextra -Wshadow -Wundef
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test: testbench.exe firmware/firmware.hex
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test: testbench.exe firmware/firmware.hex
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vvp -N testbench.exe
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vvp -N testbench.exe
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testbench.vcd: testbench.exe firmware/firmware.hex
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vvp -N $< +vcd
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testbench_view: testbench.vcd
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gtkwave $< testbench.gtkw
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test_sp: testbench_sp.exe firmware/firmware.hex
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test_sp: testbench_sp.exe firmware/firmware.hex
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vvp -N testbench_sp.exe
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vvp -N testbench_sp.exe
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@ -50,7 +57,7 @@ firmware/start.o: firmware/start.S
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riscv64-unknown-elf-gcc -c -m32 -o $@ $<
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riscv64-unknown-elf-gcc -c -m32 -o $@ $<
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firmware/%.o: firmware/%.c
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firmware/%.o: firmware/%.c
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riscv64-unknown-elf-gcc -c -m32 -march=RV32I -Os -ffreestanding -nostdlib -o $@ $<
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riscv64-unknown-elf-gcc -c -m32 -march=RV32I -Os $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $<
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tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
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tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
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riscv64-unknown-elf-gcc -c -m32 -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \
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riscv64-unknown-elf-gcc -c -m32 -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \
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@ -62,7 +69,7 @@ toc:
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clean:
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clean:
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rm -vrf $(FIRMWARE_OBJS) $(TEST_OBJS) \
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rm -vrf $(FIRMWARE_OBJS) $(TEST_OBJS) \
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firmware/firmware.{elf,bin,hex,map} synth.v \
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firmware/firmware.{elf,bin,hex,map} synth.v \
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testbench{,_sp,_axi,_synth}.exe testbench.vcd
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testbench.exe testbench_sp.exe testbench_axi.exe testbench_synth.exe testbench.vcd
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.PHONY: test test_sp test_axi test_sync toc clean
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.PHONY: test test_sp test_axi test_sync toc clean
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@ -237,8 +237,10 @@ module testbench;
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end
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end
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initial begin
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initial begin
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if ($test$plusargs("vcd")) begin
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$dumpfile("testbench.vcd");
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$dumpfile("testbench.vcd");
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$dumpvars(0, testbench);
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$dumpvars(0, testbench);
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end
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repeat (1000000) @(posedge clk);
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repeat (1000000) @(posedge clk);
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$display("TIMEOUT");
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$display("TIMEOUT");
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$finish;
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$finish;
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