mirror of https://github.com/YosysHQ/picorv32.git
Do not load next word when loading a 16 bit opcode from the upper half of a 32bit word
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picorv32.v
11
picorv32.v
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@ -218,17 +218,20 @@ module picorv32 #(
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reg [15:0] mem_16bit_buffer;
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reg [15:0] mem_16bit_buffer;
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wire mem_busy = |{mem_do_prefetch, mem_do_rinst, mem_do_rdata, mem_do_wdata};
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wire mem_busy = |{mem_do_prefetch, mem_do_rinst, mem_do_rdata, mem_do_wdata};
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wire mem_done = resetn && ((mem_valid && mem_ready && |mem_state && (mem_do_rinst || mem_do_rdata || mem_do_wdata)) || (&mem_state && mem_do_rinst)) && !mem_la_firstword;
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wire mem_done = resetn && ((mem_valid && mem_ready && |mem_state && (mem_do_rinst || mem_do_rdata || mem_do_wdata)) || (&mem_state && mem_do_rinst)) &&
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(!mem_la_firstword || (~&mem_rdata[17:16] && mem_valid && mem_ready));
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assign mem_la_write = resetn && !mem_state && mem_do_wdata;
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assign mem_la_write = resetn && !mem_state && mem_do_wdata;
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assign mem_la_read = resetn && ((!mem_state && (mem_do_rinst || mem_do_prefetch || mem_do_rdata)) || (mem_valid && mem_ready && mem_la_firstword && !mem_la_secondword));
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assign mem_la_read = resetn && ((!mem_state && (mem_do_rinst || mem_do_prefetch || mem_do_rdata)) ||
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(COMPRESSED_ISA && mem_valid && mem_ready && mem_la_firstword && !mem_la_secondword && &mem_rdata[17:16]));
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assign mem_la_addr = (mem_do_prefetch || mem_do_rinst) ? {next_pc[31:2] + (mem_valid && mem_ready && mem_la_firstword), 2'b00} : {reg_op1[31:2], 2'b00};
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assign mem_la_addr = (mem_do_prefetch || mem_do_rinst) ? {next_pc[31:2] + (mem_valid && mem_ready && mem_la_firstword), 2'b00} : {reg_op1[31:2], 2'b00};
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wire [31:0] mem_rdata_latched_noshuffle;
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wire [31:0] mem_rdata_latched_noshuffle;
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assign mem_rdata_latched_noshuffle = ((mem_valid && mem_ready) || LATCHED_MEM_RDATA) ? mem_rdata : mem_rdata_q;
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assign mem_rdata_latched_noshuffle = ((mem_valid && mem_ready) || LATCHED_MEM_RDATA) ? mem_rdata : mem_rdata_q;
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wire [31:0] mem_rdata_latched;
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wire [31:0] mem_rdata_latched;
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assign mem_rdata_latched = COMPRESSED_ISA && mem_la_secondword ? {mem_rdata_latched_noshuffle[15:0], mem_16bit_buffer} : mem_rdata_latched_noshuffle;
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assign mem_rdata_latched = COMPRESSED_ISA && mem_la_secondword ? {mem_rdata_latched_noshuffle[15:0], mem_16bit_buffer} :
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COMPRESSED_ISA && mem_la_firstword ? {16'bx, mem_rdata_latched_noshuffle[31:16]} : mem_rdata_latched_noshuffle;
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always @* begin
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always @* begin
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(* full_case *)
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(* full_case *)
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@ -401,7 +404,7 @@ module picorv32 #(
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end
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end
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1: begin
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1: begin
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if (mem_ready) begin
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if (mem_ready) begin
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if (COMPRESSED_ISA && mem_la_firstword && !mem_la_secondword) begin
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if (COMPRESSED_ISA && mem_la_read) begin
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mem_addr <= mem_la_addr;
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mem_addr <= mem_la_addr;
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mem_la_secondword <= 1;
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mem_la_secondword <= 1;
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mem_16bit_buffer <= mem_rdata[31:16];
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mem_16bit_buffer <= mem_rdata[31:16];
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